NC Verilog : Representing digital simulations in an Analog way

After many hours of research and meticulous reading. Finally we could represent digital simulations in an analog way in Cadence, NC Verilog simulator.

Select the trace you want to show as Analog
Go to the "format" menu, select "trace", and then "Analog / Sample + Hold"

You may not see what you expect at first, but go over to the right hand side of the trace, and click on the little icon that looks like a box, and it will then display all values - you can adjust how it looks at the left hand side of the trace by click/dragging the red line - it will stretch it out in the y direction.
Still does not make sense try minimizing the waveform/ fit in the window in the simulator i.e. "=" and that should do the trick.